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ds069 (v4.3) april 3, 2006 www.xilinx.com 1 product specification ? 1996-2006 xilinx, inc. all rights reserved. all xilinx trademarks, registered trademarks, patents, and disclaimers are as lis ted at http://www.xilinx.com/legal.htm . all other trademarks and registered trademarks are the property of their respective owners. all specifications are subject to c hange without notice. features ? 15 ns pin-to-pin logic delays on all pins ?f cnt to 95 mhz ? 288 macrocells with 6,400 usable gates ? up to 166 user i/o pins ? 5v in-system programmable - endurance of 10,000 program/erase cycles - program/erase over full commercial voltage and temperature range ? enhanced pin-locking architecture ? flexible 36v18 function block - 90 product terms drive any or all of 18 macrocells within function block - global and product term clocks, output enables, set and reset signals ? extensive ieee std 1149.1 boundary-scan (jtag) support ? programmable power reduction mode in each macrocell ? slew rate control on individual outputs ? user programmable ground pin capability ? extended pattern security features for design protection ? high-drive 24 ma outputs ? 3.3v or 5v i/o capability ? advanced cmos 5v fastflash? technology ? supports parallel programming of more than one xc9500 concurrently ? available 352-pin bga and 208-pin hqfp packages description the xc95288 is a high-performance cpld providing advanced in-system programming and test capabilities for general purpose logic integration. it is comprised of eight 36v18 function blocks, providing 6,400 usable gates with propagation delays of 15 ns. see figure 2 for the architec- ture overview. power management power dissipation can be reduced in the xc95288 by con- figuring macrocells to standard or low-power modes of operation. unused macrocells are turned off to minimize power dissipation. operating current for each design can be approximated for specific operating conditions using the following equation: i cc (ma) = mc hp (1.7) + mc lp (0.9) + mc (0.006 ma/mhz) f where: mc hp = macrocells in high-performance mode mc lp = macrocells in low-power mode mc = total number of macrocells used f = clock frequency (mhz) figure 1 shows a typical calculation for the xc95288 device. 0 xc95288 in-system programmable cpld ds069 (v4.3) april 3, 2006 05 product specification r figure 1: typical i cc vs. frequency for xc95288 clock frequency (mhz) typical i cc (ma) 050 300 (500) (700) (500) 600 900 100 high performance low power ds069_01_110101
xc95288 in-system programmable cpld 2 www.xilinx.com ds069 (v4.3) april 3, 2006 product specification r figure 2: xc95288 architecture function block outputs (indicated by the bold line) drive the i/o blocks directly. in-system programming controller jtag controller i/o blocks function block 1 macrocells 1 to 18 macrocells 1 to 18 jtag port 3 36 i/o/gts i/o/gsr i/o/gck i/o i/o i/o i/o 2 1 i/o i/o i/o i/o 3 ds069_02_110101 1 function block 2 36 18 18 function block 3 macrocells 1 to 18 macrocells 1 to 18 36 function block 16 36 18 18 function block 4 macrocells 1 to 18 36 18 fast connect ii switch matrix
xc95288 in-system programmable cpld ds069 (v4.3) april 3, 2006 www.xilinx.com 3 product specification r absolute maximum ratings recommended operation conditions quality and reliability characteristics dc characteristic over recommended operating conditions symbol description value units v cc supply voltage relative to gnd ?0.5 to 7.0 v v in input voltage relative to gnd ?0.5 to v cc + 0.5 v v ts voltage applied to 3-state output ?0.5 to v cc + 0.5 v t stg storage temperature (ambient) ?65 to +150 o c t j junction temperature +150 o c notes: 1. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under operating condi tions is not implied. exposure to absolute maximum ratings conditions for extended periods of time may affect device reliability. symbol parameter min max units v ccint supply voltage for internal logic and input buffers commercial t a = 0 o c to 70 o c 4.75 5.25 v industrial t a = ?40 o c to +85 o c4.5 5.5 v ccio supply voltage for output drivers for 5v operation commercial t a = 0 o c to 70 o c 4.75 5.25 v industrial t a = ?40 o c to +85 o c4.5 5.5 supply voltage for output drivers for 3.3v operation 3.0 3.6 v il low-level input voltage 0 0.80 v v ih high-level input voltage 2.0 v ccint + 0.5 v v o output voltage 0 v ccio v symbol parameter min max units t dr data retention 20 - years n pe program/erase cycles (endurance) 10,000 - cycles symbol parameter test conditions min max units v oh output high voltage for 5v outputs i oh = ?4.0 ma, v cc = min 2.4 - v output high voltage for 3.3v outputs i oh = ?3.2 ma, v cc = min 2.4 - v v ol output low voltage for 5v outputs i ol = 24 ma, v cc = min - 0.5 v output low voltage for 3.3v outputs i ol = 10 ma, v cc = min - 0.4 v i il input leakage current v cc = max v in = gnd or v cc -10 a i ih i/o high-z leakage current v cc = max v in = gnd or v cc -10 a c in i/o capacitance v in = gnd f = 1.0 mhz -10pf i cc operating supply current (low power mode, active) v i = gnd, no load f = 1.0 mhz 300 (typical) ma
xc95288 in-system programmable cpld 4 www.xilinx.com ds069 (v4.3) april 3, 2006 product specification r ac characteristics symbol parameter xc95288-15 xc95288-20 units min max min max t pd i/o to output valid - 15.0 - 20.0 ns t su i/o setup time before gck 8.0 - 10.0 - ns t h i/o hold time after gck 0 - 0 - ns t co gck to output valid - 8.0 - 10.0 ns f cnt (1) 16-bit counter frequency 95.2 - 83.3 - mhz f system (2) multiple fb internal operating frequency 55.6 - 50.0 - mhz t psu i/o setup time before p-term clock input 4.0 - 4.0 - ns t ph i/o hold time after p-term clock input 4.0 - 6.0 - ns t pco p-term clock output valid - 12.0 - 16.0 ns t oe gts to output valid - 11.0 - 16.0 ns t od gts to output disable - 11.0 - 16.0 ns t poe product term oe to output enabled - 14.0 - 18.0 ns t pod product term oe to output disabled - 14.0 - 18.0 ns t wlh gck pulse width (high or low) 5.5 - 5.5 - ns t aprpw asynchronous preset/reset pulse width (high or low) 8.0 - 8.0 - ns notes: 1. f cnt is the fastest 16-bit counter frequency available, using the local feedback when applicable. f cnt is also the export control maximum flip-flop toggle rate, f tog . 2. f system is the internal operating frequency for general purpose system designs spanning multiple fbs. figure 3: ac load circuit device output output type v test 5.0v 3.3v v test r 1 160 260 r 1 r 2 c l r 2 120 360 c l 35 pf 35 pf ds067_03_110101 v ccio 5.0v 3.3v
xc95288 in-system programmable cpld ds069 (v4.3) april 3, 2006 www.xilinx.com 5 product specification r internal timing parameters symbol parameter xc95288-15 xc95288-20 units min max min max buffer delays t in input buffer delay - 4.5 - 6.5 ns t gck gck buffer delay - 3.0 - 3.0 ns t gsr gsr buffer delay - 7.5 - 9.5 ns t gts gts buffer delay - 11.0 - 16.0 ns t out output buffer delay - 4.5 - 6.5 ns t en output buffer enable/disable delay - 0 - 0 ns product term control delays t ptck product term clock delay - 2.5 - 2.5 ns t ptsr product term set/reset delay - 3.0 - 3.0 ns t ptts product term 3-state delay - 5.0 - 5.0 ns internal register and combinatorial delays t pdi combinatorial logic propagation delay - 3.0 - 4.0 ns t sui register setup time 3.5 - 3.5 - ns t hi register hold time 4.5 - 6.5 - ns t coi register clock to output valid time - 0.5 - 0.5 ns t aoi register async. s/r to output delay - 8.0 - 8.0 ns t rai register async. s/r recover before clock 10.0 - 10.0 - ns t logi internal logic delay - 3.0 - 3.0 ns t logilp internal low power logic delay - 11.5 - 11.5 ns feedback delays t f fastconnect feedback delay - 11.0 - 13.0 ns t lf function block local feedback delay - 3.5 - 5.0 ns time adders t pta (1) incremental product term allocator delay - 1.0 - 1.5 ns t slew slew-rate limited delay - 5.0 - 5.5 ns notes: 1. t pta is multiplied by the span of the function as defined in the xc9500 family data sheet.
xc95288 in-system programmable cpld 6 www.xilinx.com ds069 (v4.3) april 3, 2006 product specification r xc95288 i/o pins function block macrocell hq208 bg352 bscan order function block macrocell hq208 bg352 bscan order 1 1 ? ? 861 3 1 ? ? 753 1 2 28 n26 858 3 2 38 u24 750 1 3 29 p25 855 3 3 39 u23 747 1 4 ? ? 852 3 4 ? ? 744 1 5 30 p23 849 3 5 40 y26 741 1 6 31 p24 846 3 6 41 w25 738 1 7 ? ? 843 3 7 ? ? 735 1 8 32 r26 840 3 8 43 aa26 732 1 9 ? r25 837 3 9 ? y25 729 1 10 33 r24 834 3 10 44 [1] y24 [1] 726 [1] 1 11 ? r23 831 3 11 ? aa25 723 1 12 34 t26 828 3 12 45 ab25 720 113??825 3 13??717 1 14 35 t25 822 3 14 [1] 46 [1] aa24 [1] 714 1 15 36 t23 819 3 15 47 y23 711 116??816 3 16??708 1 17 37 v26 813 3 17 48 ac26 705 118??810 3 18??702 2 1 ? ? 807 4 1 ? ? 699 2215k23804 42 [1] 3 [1] e23 [1] 696 2 3 16 k24 801 4 3 4 c26 693 2 4 ? ? 798 4 4 ? ? 690 2517j25795 45 [1] 5 [1] e24 [1] 687 2 6 18 l24 792 4 6 6 f24 684 2 7 ? ? 789 4 7 ? ? 681 2819k25786 48 [1] 7 [1] e25 [1] 678 2 9 ? l25 783 4 9 ? d26 675 2 10 20 l26 780 4 10 8 g24 672 211?m23777 4 11?f25669 2 12 21 m24 774 4 12 [1] 9 [1] f26 [1] 666 213??771 4 13??663 2 14 22 m25 768 4 14 10 h23 660 2 15 23 m26 765 4 15 12 g26 657 216??762 4 16??654 2 17 25 n25 759 4 17 14 h25 651 218??756 4 18??648 notes: 1. global control pin.
xc95288 in-system programmable cpld ds069 (v4.3) april 3, 2006 www.xilinx.com 7 product specification r 5 1 ? ? 645 7 1 ? ? 537 5 2 49 aa23 642 7 2 62 ac19 534 5 3 50 ab24 639 7 3 63 ad19 531 5 4 ? ? 636 7 4 ? ? 528 5 5 51 ad25 633 7 5 64 ae20 525 5 6 54 ae24 630 7 6 66 ac18 522 5 7 ? ? 627 7 7 ? ? 519 58 [1] 55 [1] ad23 [1] 624 7 8 67 ad18 516 59?ac22621 7 9?ae19513 51056af24618 7 1069ad17510 5 11 ? ad22 615 7 11 ? ae18 507 5 12 57 ae23 612 7 12 70 af18 504 513??609 7 13??501 5 14 58 ae22 606 7 14 71 ae17 498 5 15 60 ae21 603 7 15 72 ae16 495 516??600 7 16??492 5 17 61 af21 597 7 17 73 af16 489 518??594 7 18??486 6 1 ? ? 591 8 1 ? ? 483 6 2 197 c19 588 8 2 186 a15 480 6 3 198 d18 585 8 3 187 b15 477 6 4 ? ? 582 8 4 ? ? 474 6 5 199 a21 579 8 5 188 c15 471 6 6 200 b20 576 8 6 189 d15 468 6 7 ? ? 573 8 7 ? ? 465 6 8 201 c20 570 8 8 191 a16 462 6 9 ? b21 567 8 9 ? b16 459 6 10 202 b22 564 8 10 192 c16 456 611?c21561 8 11?b17453 6 12 203 d20 558 8 12 193 c17 450 613??555 8 13??447 6 14 205 b24 552 8 14 194 b18 444 615 [1] 206 [1] c23 [1] 549 8 15 195 a20 441 616??546 8 16??438 6 17 208 d22 543 8 17 196 b19 435 618??540 8 18??432 notes: 1. global control pin. xc95288 i/o pins (continued) function block macrocell hq208 bg352 bscan order function block macrocell hq208 bg352 bscan order
xc95288 in-system programmable cpld 8 www.xilinx.com ds069 (v4.3) april 3, 2006 product specification r 91??42911 1??321 9 2 74 ae14 426 11 2 87 ad9 318 9 3 75 af14 423 11 3 88 ac10 315 94??42011 4??312 9 5 76 ae13 417 11 5 89 af7 309 9 6 77 ac13 414 11 6 90 ae8 306 97??41111 7??303 9 8 78 ad13 408 11 8 91 ad8 300 9 9 ? af12 405 11 9 ? ae7 297 9 10 80 ae12 402 11 10 95 ad7 294 9 11 82 ad12 399 11 11 97 ae5 291 9 12 83 ac12 396 11 12 99 ac7 288 9 13 ? ? 393 11 13 ? ? 285 9 14 84 af11 390 11 14 100 ae3 282 9 15 85 ae11 387 11 15 101 ad4 279 9 16 ? ? 384 11 16 ? ? 276 9 17 86 ae9 381 11 17 102 ac5 273 9 18 ? ? 378 11 18 ? ? 270 10 1 ? ? 375 12 1 ? ? 267 10 2 170 c10 372 12 2 158 b3 264 10 3 171 b9 369 12 3 159 a3 261 10 4 ? ? 366 12 4 ? ? 258 10 5 173 a9 363 12 5 160 d6 255 10 6 174 d11 360 12 6 161 c6 252 10 7 ? ? 357 12 7 ? ? 249 10 8 175 b11 354 12 8 162 b5 246 10 9 ? a11 351 12 9 ? a4 243 10 10 178 c12 348 12 10 164 b6 240 10 11 179 b12 345 12 11 165 a6 237 10 12 180 a12 342 12 12 166 d8 234 10 13 ? ? 339 12 13 ? ? 231 10 14 182 a13 336 12 14 167 b7 228 10 15 183 b14 333 12 15 168 a7 225 10 16 ? ? 330 12 16 ? ? 222 10 17 185 c14 327 12 17 169 d9 219 10 18 ? ? 324 12 18 ? ? 216 xc95288 i/o pins (continued) function block macrocell hq208 bg352 bscan order function block macrocell hq208 bg352 bscan order
xc95288 in-system programmable cpld ds069 (v4.3) april 3, 2006 www.xilinx.com 9 product specification r 13 1 ? ? 213 15 1 ? ? 105 13 2 103 ad3 210 15 2 117 v3 102 13 3 106 ad2 207 15 3 118 w2 99 13 4 ? ? 204 15 4 ? ? 96 13 5 107 ac3 201 15 5 119 u4 93 13 6 109 ad1 198 15 6 120 u3 90 13 7 ? ? 195 15 7 ? ? 87 13 8 110 aa4 192 15 8 121 v2 84 13 9 ? aa3 189 15 9 ? v1 81 13 10 111 ab2 186 15 10 122 u2 78 13 11 112 ac1 183 15 11 123 t2 75 13 12 113 aa2 180 15 12 125 r4 72 13 13 ? ? 177 15 13 ? ? 69 13 14 114 aa1 174 15 14 126 r3 66 13 15 115 y1 171 15 15 127 r2 63 13 16 ? ? 168 15 16 ? ? 60 13 17 116 v4 165 15 17 128 r1 57 13 18 ? ? 162 15 18 ? ? 54 14 1 ? ? 159 16 1 ? ? 51 14 2 144 k3 156 16 2 131 p1 48 14 3 145 g1 153 16 3 133 n2 45 14 4 ? ? 150 16 4 ? ? 42 14 5 146 h2 147 16 5 134 n4 39 14 6 147 h3 144 16 6 135 n3 36 14 7 ? ? 141 16 7 ? ? 33 14 8 148 j4 138 16 8 136 m1 30 14 9 ? f1 135 16 9 ? m2 27 14 10 149 g2 132 16 10 137 m3 24 14 11 150 g3 129 16 11 138 m4 21 14 12 151 f2 126 16 12 139 l1 18 14 13 ? ? 123 16 13 ? ? 15 14 14 152 e2 120 16 14 140 l2 12 14 15 154 d2 117 16 15 142 l3 9 14 16 ? ? 114 16 16 ? ? 6 14 17 155 f4 111 16 17 143 j1 3 14 18 ? ? 108 16 18 ? ? 0 xc95288 i/o pins (continued) function block macrocell hq208 bg352 bscan order function block macrocell hq208 bg352 bscan order
xc95288 in-system programmable cpld 10 www.xilinx.com ds069 (v4.3) april 3, 2006 product specification r xc95288 global, jtag, and power pins pin type hq208 bg352 i/o/gck1 44 y24 i/o/gck2 46 aa24 i/o/gck3 55 ad23 i/o/gts1 7 e25 i/o/gts2 9 f26 i/o/gts3 3 e23 i/o/gts4 5 e24 i/o/gsr 206 c23 tck 98 ad6 tdi 94 af6 tdo 176 d12 tms 96 ae6 v ccint 5v 11, 59, 124, 153, 204 j23, v24, af23, ac15, af15, ad11, ad5, y3, t1, j3, g4, d5, d10, b13, d17, c22, h24 v ccio 3.3v/5v 1, 26, 53, 65, 79, 92, 105, 132, 157, 172, 181, 184 a10, a17, b2, b25, d7, d13, d19, g23, h4, k1, k26, n23, p4, u1, u26, w23, y4, ac8, ac14, ac20, ae25, af10, af17 gnd 2, 13, 24, 27, 42, 52, 68, 81, 93, 104,1 08, 129, 130, 141, 156, 163, 177, 190, 207 a1, a2, a5, a8, a14, a19, a22, a25, a26, b1, b26, c7, c9, c13, c18, d24, e1, e26, h1, h26, k4, n1, n24, p3, p26, v23, w1, w4, w26, ab1, ab4, ab26, ac9, ad10, ad14, ad15, ad20, ae1, ae26, af1, af2, af5, af8, af13, af19, af22, af25, af26 no connects - a18, a23, a24, b4, b8, b10, b23, c1, c2, c3, c4, c5, c8, c11, c24, c25, d1, d3, d4, d14, d16, d21, d23, d25, e3, e4, f3, f23, g25, j2, j24, j26, k2, l4, l23, p2, t3, t4, t24, u25, v25, w3, w24, y2, ab3, ab23, ac2, ac4, ac6, ac11, ac16, ac17, ac21, ac23, ac24, ac25, ad16, ad21, ad24, ad26, ae2, ae4, ae10, ae15, af3, af4, af9, af20
xc95288 in-system programmable cpld ds069 (v4.3) april 3, 2006 www.xilinx.com 11 product specification r device part marking and ordering combination information warranty disclaimer these products are subject to the terms of the xilinx limited warranty which can be viewed at http://www.xilinx.com/warranty.htm . this limited warranty does not extend to any use of the products in an application or environment that is not within the specifications stated on the then-current xilinx data sheet for the products. products are not designed to be fail-safe and are not warranted for use in applications that pose a risk of physical harm or loss of life. use of products in such applications is fully at the risk of customer subject to applicable laws and regulations. revision history the following table shows the revision history for this document. device ordering and part marking number speed (pin-to-pin delay) pkg. symbol no. of pins package type operating range (1) xc95288-10hq208c 10 ns hq208 208-pin heat sink quad flat pack (hqfp) c xc95288-10bg352c 10 ns bg352 352-ball ball grid array (bga) c xc95288-15hq208c 15 ns hq208 208-pin heat sink quad flat pack (hqfp) c XC95288-15BG352C 15 ns bg352 352-ball ball grid array (bga) c xc95288-15hq208i 15 ns hq208 208-pin heat sink quad flat pack (hqfp) i xc95288-15bg352i 15 ns bg352 352-ball ball grid array (bga) i xc95288-20hq208c 20 ns hq208 208-pin heat sink quad flat pack (hqfp) c xc95288-20bg352c 20 ns bg352 352-ball ball grid array (bga) c xc95288-20hq208i 20 ns hq208 208-pin heat sink quad flat pack (hqfp) i xc95288-20bg352i 20 ns bg352 352-ball ball grid array (bga) i notes: 1. c = commercial: t a = 0 to +70c; i = industrial: t a = ?40 to +85c date version revision 12/04/98 3.1 update ac characteristics and internal parameters. 06/18/03 4.0 updated format. xc95xxx tq144 7c device type package speed operating range this line not related to device part number sample package with part marking. r 1
xc95288 in-system programmable cpld 12 www.xilinx.com ds069 (v4.3) april 3, 2006 product specification r 08/21/03 4.1 updated package device marking pin 1 orientation. 04/15/05 4.2 added asynchronous preset/reset pulse width specification (t aprpw ). 04/03/06 4.3 added warranty disclaimer. date version revision

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